China's Silicon Pact: 13 CEOs, 80% Self-Sufficiency, and the End of the Chip Embargo

How Beijing's semiconductor titans are turning export controls into an accelerant

Executive Summary

At Semicon China 2026 this week, 13 of China's top semiconductor CEOs jointly committed to achieving 80% domestic chip self-sufficiency by 2030 — a target that would fundamentally reshape the $1.8 trillion global semiconductor market and render US export controls strategically obsolete.
The announcement arrives amid a convergence of breakthroughs: Hua Hong's 7nm process readiness (making it China's second advanced foundry), Huawei's Ascend 950PR winning orders from ByteDance and Alibaba, and SMIC's aggressive 2026 expansion plan — all while US export policy drifts in a regulatory vacuum after the Trump administration withdrew its AI chip rules.
The implications extend far beyond trade policy: China is now building a parallel semiconductor stack from wafers to EDA tools, creating a structural bifurcation that could permanently split the global chip supply chain into two incompatible ecosystems by decade's end.

Chapter 1: The Pact — Shanghai's Semiconductor Davos

The setting was Semicon China 2026, the largest semiconductor trade show in Asia, held this week in Shanghai. What emerged was not a product launch but a declaration of industrial intent: 13 of China's most powerful chip executives — spanning foundries, memory, equipment, and EDA software — jointly committed to a target that would have seemed fantastical five years ago. By 2030, they pledged, China would manufacture 80% of the chips it consumes domestically.

The signatories read like a roster of China's semiconductor ambitions made flesh. SMIC co-founder Wang Yangyuan. Leaders from YMTC, China's memory giant. Naura Technology, now the world's fifth-largest semiconductor equipment maker. Empyrean, the leading domestic EDA software developer. Together, they represent the four critical pillars of chip independence: design tools, manufacturing, memory, and equipment.

This is not the first time Beijing has set ambitious chip targets. The "Made in China 2025" plan called for 70% self-sufficiency by 2025 — a target that was missed by a wide margin. But the 2026 pact is different in three critical ways.

First, it is industry-led rather than government-directed. The 13 CEOs authored a joint paper identifying three specific chokepoints where US export controls have been most effective: electronic design automation (EDA) software, silicon wafers, and manufacturing equipment — particularly extreme ultraviolet (EUV) lithography. Rather than waiting for state directives, the industry is self-organizing to close these gaps.

Second, the starting point is dramatically higher. China's chip output is projected to reach 42% of global production by 2028, up from 37% in 2026, according to SEMI China. The country has already achieved meaningful scale in mature nodes (28nm and above), and the gap at advanced nodes is narrowing faster than Western analysts projected even 18 months ago.

Third, the geopolitical context has shifted. The Iran war's disruption of helium supplies from Qatar's Ras Laffan facility — which provided 30% of the world's semiconductor-grade helium — has exposed the fragility of globalized chip supply chains in ways that validate Beijing's autarky thesis. The war's impact on Korean and Taiwanese chipmakers (KOSPI's two circuit breakers, TSMC's power rationing concerns) has paradoxically strengthened China's argument that self-sufficiency is existential, not aspirational.

Chapter 2: The Breakthrough Cascade — From Paper Targets to Silicon Reality

What makes the 80% target credible is not the pledge itself but the cascade of technical breakthroughs arriving simultaneously.

Hua Hong's 7nm Moment

On March 16, Reuters reported exclusively that Hua Hong Group's foundry subsidiary, Huali Microelectronics, is preparing 7nm chip production at its Shanghai plant. This makes it the second Chinese chipmaker — after SMIC — capable of advanced manufacturing. Huawei's SiCarrier lithography equipment is reportedly involved, suggesting a deepening domestic equipment supply chain.

The significance is structural. When SMIC produced its 7nm Kirin 9000S chip in 2023, Western analysts dismissed it as a one-off achievement using aging DUV multi-patterning techniques. Having a second foundry reach this capability transforms it from an exception into a trend. It signals that China's approach — brute-forcing advanced nodes through DUV rather than waiting for domestic EUV — is replicable and potentially scalable.

Huawei's Ascend 950PR: The CUDA Killer

On March 27, Reuters reported that ByteDance and Alibaba are planning to place significant orders for Huawei's new Ascend 950PR AI chip. This marks a dramatic shift. Huawei's previous flagship, the Ascend 910C, struggled to gain traction with private-sector tech firms despite government encouragement. The 950PR reportedly delivers 1.56 petaflops of FP4 performance — 2.87x the H20, the most powerful chip Nvidia can legally sell in China.

The critical change is software compatibility. Sources indicate the 950PR is "more compatible with Nvidia's CUDA software system and has better response speeds." This directly attacks Nvidia's deepest moat. If Chinese developers can run CUDA-optimized code on Ascend hardware with minimal friction, the network effects that have made CUDA dominant begin to erode — first in China, then potentially in markets where Nvidia faces export restrictions or pricing pressure.

Huawei plans to ship 750,000 units in 2026, according to earlier reports. At scale, this creates a self-reinforcing ecosystem: more chips deployed means more developers optimizing for Ascend, which means more demand for Ascend chips.

SMIC's 2026 Action Plan

SMIC, China's largest foundry, filed a new action plan on March 26 in both Shanghai and Hong Kong exchanges. The plan targets operational improvement, R&D acceleration, and capacity expansion across existing businesses while seeking growth in AI-driven applications. SMIC reported strong 2025 financial results driven by capacity expansion and AI demand, with 2026 designated as a "critical year."

The challenge is capital intensity. SMIC faces a projected 30% jump in depreciation costs for 2026 as its massive expansion hits the books. But the strategic calculus is clear: build now while government subsidies flow, because the window for establishing competitive scale may not last.

Naura's Equipment Push

At Semicon China, Naura Technology unveiled a hybrid bonding tool — a critical technology for advanced chip packaging that has been dominated by firms like Besi and Applied Materials. Chinese equipment makers including Naura, AMEC, Piotech, and ACM Research showcased expanded product lineups across etching, deposition, and metrology.

Yet the CEOs' own assessment was bracingly honest. In a joint paper, they described China's semiconductor equipment sector as "small, fragmented, and weak," calling for a national effort to consolidate and invest. The gap in EUV lithography remains China's most critical vulnerability — SMEE's most advanced lithography tool operates at 28nm, compared to ASML's sub-3nm EUV systems. The 80% target implicitly assumes either a breakthrough in domestic EUV or continued success with DUV multi-patterning at ever-smaller nodes.

Chapter 3: The Export Control Vacuum

The timing of China's self-sufficiency push coincides with an extraordinary moment in US trade policy: regulatory paralysis.

In mid-March, the Trump administration withdrew its proposed AI chip export rules without replacement. The move was widely interpreted as a bargaining chip for the Trump-Xi summit originally planned for March 31 (now postponed to May 14-15). Meanwhile, the SCOTUS IEEPA ruling of February 20 invalidated broad executive tariff authority, and the Section 122 bridge tariff expires on July 24, creating a legal vacuum.

The result is a paradox: the US has signaled maximum strategic intent to contain China's chip ambitions while simultaneously creating the conditions for maximum Chinese progress. With export rules withdrawn, enforcement uncertain, and the administration focused on the Iran war, Chinese firms are operating in the most permissive environment since 2022.

The Malaysia loophole exemplifies the problem. ByteDance has deployed 36,000 Nvidia Blackwell B200 chips through a Malaysian cloud partner, Aolani, in a $2.5 billion deal that technically complies with geography-based rules but clearly violates their spirit. The Supermicro indictment — $2.5 billion in servers diverted to China through dummy shipments — reveals the scale of circumvention.

This is the Toshiba-Kongsberg moment of the AI era: export controls are generating the worst possible outcome — they inflict enough pain to motivate Chinese self-sufficiency while failing to actually prevent Chinese access to advanced technology.

Chapter 4: The Parallel Stack — Two Semiconductor Worlds

The most consequential development is not any single chip or tool but the emergence of a complete parallel semiconductor stack.

Design tools (EDA): Empyrean Technology is expanding rapidly as China's leading domestic EDA provider, though it remains far behind Synopsys and Cadence in advanced capabilities.

Lithography: SMEE (Shanghai Micro Electronics Equipment) operates at 28nm with DUV, while Huawei-affiliated SiCarrier is reportedly supporting Hua Hong's 7nm development. The Chinese industry has publicly acknowledged the EUV gap as its most critical weakness.

Foundry: SMIC at 7nm (with 5nm in development), Hua Hong now reaching 7nm. China projected to reach 42% of global chip production by 2028.

Memory: CXMT planning mainland IPO in early 2026, YMTC expanding NAND capacity. Chinese firms are targeting domestic HBM3 production by end of 2026.

Equipment: Naura (deposition, etching, hybrid bonding), AMEC (14nm etching), Piotech (CVD), ACM Research (cleaning). China's semiconductor equipment companies have expanded rapidly, though they acknowledge being "small, fragmented, and weak" relative to global leaders.

AI Chips: Huawei Ascend 950PR (1.56 PFLOPS FP4), with 920, and roadmap to 960/970. Cambricon, Biren, and others filling niches.

This is not yet a competitive stack at the frontier. But it is a functional stack — one that can serve the vast majority of China's domestic needs. And the 80% target implicitly acknowledges this: China is not trying to replicate TSMC's cutting edge. It is trying to ensure that 80% of the chips consumed in China are made in China, which overwhelmingly means mature nodes for automotive, industrial, IoT, consumer electronics, and all but the most demanding AI applications.

Chapter 5: Scenario Analysis

Scenario A: Accelerated Decoupling (35%)

Thesis: China achieves 65-70% self-sufficiency by 2030 (short of 80% but transformative).

Triggers:

Hua Hong's 7nm enters volume production by late 2026
Ascend 950PR captures 30%+ of China's AI chip market
Big Fund Phase III deploys $50B+ in targeted equipment and materials investments
Multiple Chinese memory firms achieve HBM3 production

Historical parallel: Japan's semiconductor industry in the 1980s achieved rapid scale-up through coordinated industrial policy (VLSI Technology Research Association, 1976-1980), capturing 50% global DRAM market share by 1988.

Investment implications: ASML revenue from China declines significantly (already warned), Tokyo Electron and Applied Materials face margin pressure. Chinese equipment makers (Naura, AMEC) see explosive revenue growth. SK Hynix and Samsung face structural competition in mature nodes.

Probability rationale: China's track record of industrial mobilization (high-speed rail, 5G, EVs, solar) plus $280B+ cumulative semiconductor investment makes significant progress near-certain. The 80% target overshoots, but 65-70% is achievable given current trajectory.

Scenario B: Fragmented Progress (45%)

Thesis: China reaches 50-55% self-sufficiency by 2030, achieving breadth but not depth.

Triggers:

EUV gap persists, limiting advanced node production to SMIC and Hua Hong at 7nm with low yields
Equipment sector remains fragmented despite CEO pact
US export controls tighten post-summit, targeting materials and subsystems
Software ecosystem (CUDA alternatives) reaches functional but not competitive parity

Historical parallel: India's "Make in India" defense manufacturing push — impressive headline progress but persistent gaps in quality, yield, and integration at the system level.

Investment implications: Global semiconductor leaders maintain premium pricing power at advanced nodes. Chinese firms dominate at 28nm+ but cannot compete at 5nm and below. Two-track pricing regime emerges: premium Western AI chips vs. functional-but-cheaper Chinese alternatives.

Probability rationale: The EDA and EUV gaps are genuinely hard to close. China's semiconductor industry has a pattern of impressive demonstrations followed by yield and scaling challenges. The "fragmented" nature of the equipment sector — acknowledged by the CEOs themselves — suggests coordination problems will persist.

Scenario C: External Shock Disruption (20%)

Thesis: Geopolitical escalation (Taiwan strait crisis, tightened controls, Iran war spillover) disrupts both Chinese and Western semiconductor supply chains simultaneously.

Triggers:

Taiwan energy crisis from Hormuz blockade threatens TSMC production
Helium shortage from Qatar LNG facility destruction crimps global EUV and memory production
US-China summit collapse triggers maximum export controls plus Chinese rare earth counter-restrictions
Korean semiconductor complex (KOSPI 40% weight in Samsung + SK Hynix) faces existential energy cost crisis

Historical parallel: 1973 OPEC embargo's cascading effects on Japanese manufacturing — energy shock revealed and accelerated structural shifts already underway.

Investment implications: Extreme supply chain bifurcation. Regional semiconductor indices diverge violently. Physical inventory premiums emerge. Companies with dual-source capability command massive premiums.

Chapter 6: Market Impact & Investment Implications

Winners

Chinese equipment makers (Naura, AMEC, Piotech): Direct beneficiaries of domestic substitution. Naura's hybrid bonding tool signals expansion into advanced packaging, currently a $15B+ market dominated by AMAT and Besi.
Huawei (unlisted) / HiSilicon ecosystem: Ascend 950PR's traction with ByteDance and Alibaba validates the "good enough" thesis for Chinese AI compute. Listed proxies include Ascend ecosystem companies.
US firms selling into China while they can: Nvidia's H200 China deal (25% revenue share model) represents a pragmatic acknowledgment that the window is closing. Short-term revenue boost, long-term market share loss.
Rare earth / critical mineral plays: China's 90% grip on rare earth processing gives it asymmetric leverage. Any escalation in chip wars will drive investment in alternative supply chains (MP Materials, Lynas).

Losers

ASML: Already warned of declining China revenue. Each Chinese equipment breakthrough erodes long-term demand for ASML's DUV tools, even as EUV remains beyond Chinese reach.
SK Hynix / Samsung at mature nodes: Chinese memory firms targeting HBM3 and expanding NAND capacity will intensify competition in non-frontier products.
Global foundries dependent on Chinese demand: Companies selling tools, materials, or services to Chinese fabs face binary regulatory risk.

Key Data Points

Metric	2022	2026	2030 Target
China chip self-sufficiency	~18%	~37%	80% (CEO pact)
China share of global foundry capacity	~12%	~16%	~25-30% (est.)
Huawei Ascend shipments	~50K	~750K (plan)	2M+ (est.)
Chinese equipment domestic share	~15%	~35% (est.)	70% (15th FYP)
Semiconductor market (global)	$574B	~$750B	$1.8T (IBS/Semicon)

Conclusion

The 80% self-sufficiency pact is not a credible target in its literal form. But treating it as aspirational rather than operational misses the point. The real story is the convergence: a second Chinese foundry at 7nm, an AI chip that tech giants actually want to buy, an equipment sector that is "fragmented and weak" but expanding at double-digit rates, and a regulatory vacuum in Washington that has given Beijing its widest-ever window to build.

The semiconductor industry is splitting into two ecosystems — not because anyone planned it, but because the logic of export controls creates its own opposition. Every chip China cannot buy, it is now motivated to make. Every tool it cannot import, it is now subsidizing domestically. The 13 CEOs at Semicon China this week are not making a promise. They are describing a process that is already well underway.

For investors, the question is no longer whether China can build a parallel semiconductor stack. It is how long Western incumbents can maintain their premium pricing power before Chinese alternatives become "good enough" for 80% of the market. The Ascend 950PR's CUDA compatibility improvements suggest that timeline is shorter than consensus expects.

The greatest irony of the chip war may be this: in trying to prevent China from catching up, the US may have created the conditions that made catching up inevitable.

Sources: Nikkei Asia, Reuters, SCMP, Digitimes, TrendForce, Tom's Hardware, SEMI China, IndexBox

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